IBM and Lam Research Collaborate on Sub-1 nm Logic Scaling

IBM and LRCX announced a five-year collaboration on March 10, 2026, to advance sub-1nm logic scaling in semiconductor technology. The partnership will focus on developing new materials, advanced etch and deposition capabilities for increasingly complex device architectures, and new High NA EUV lithography processes to enable next-generation interconnect and device patterning.

The teams will build and validate process flows for nanosheet and nanostack devices and backside power delivery — technologies considered critical for the next generation of AI-era chips. IBM and Lam Research have collaborated for more than a decade, notably enabling early generations of 7nm, nanosheet, and EUV process technologies. This new agreement extends their partnership into the frontier of chip manufacturing where traditional scaling approaches face fundamental physical limits.

The collaboration positions both companies at the cutting edge of semiconductor R&D at a time when demand for advanced AI chips is surging. For IBM, this deepens its role as a semiconductor research leader despite having exited chip manufacturing. For Lam Research, it reinforces the company's position as a critical equipment supplier for next-generation fabs, with potential downstream benefits as chipmakers invest in sub-1nm production capabilities.